Apparently the initial interrupt count lapic[TICR]
must be set *after* initializing the lapic[TIMER] vector.

Doing this, we now get clock interrupts on cpu 1.
(No idea why we always got them on cpu 0.)

Don't write to TCCR - it is read-only.

Mainly delete unused constants and code.

Move mp_startthem to main.c as bootothers.

Clean up lapic code.

One initialization function now, not three.
Use #defines instead of enums (consistent with other code, but sigh).

Still boots in Bochs in SMP mode.

if no lapic available, use 8253pit for clock
now xv6 runs both on qemu (uniprocessor) and bochs (uniprocessor and MP)

better parsing of sh commands (copied from jos sh)
cat: read from 1 if no args
sbrk system call, but untested
getpid system call
moved locks in keyboard intr, but why do we get intr w. null characters from keyboard?

give cpu1 a TSS and gdt for when it enters scheduler()
and a pseudo proc[] entry for each cpu
cpu0 waits for each other cpu to start up
read() for files

ioapic