drop , address=0xf0000 from romimage line.
newer bochs has a 128k bios that it loads elsewhere.
so let bochs decide where the romimage goes.

change cpu quantum to 1 (default is 5, max is 16)
in an attempt to provoke more races.  only provokes
them slightly more frequently, may not be worth
the slowdown.

the macro expansion of "char *cp;" turned into
char *(curproc[cpu()]);  which declares a dynamically
sized array of char* called curproc.

so then &cp == &(curproc[cpu()]) was actually a
stack variable as "expected".  it was one past the
end of the array, but the implicit alloca allocated
more than was necessary.

do not tell me that making cp a #define was a bad idea.
there are worse problems to fix.  more on that later.

Apparently the initial interrupt count lapic[TICR]
must be set *after* initializing the lapic[TIMER] vector.

Doing this, we now get clock interrupts on cpu 1.
(No idea why we always got them on cpu 0.)

Don't write to TCCR - it is read-only.

panic if unknown fault with CPL=0 (i.e. in kernel)

Change dev read/write functions
to take inode* instead of minor number.

Unlock console inode during console_read
and console_write.  Otherwise background
processes cannot write to console while the
shell is reading it waiting for input.